memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba0_mem0.h  -start 0x54e000 -end 0x55e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba0_mem1.h  -start 0x54e000 -end 0x55e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba0_mem2.h  -start 0x54e000 -end 0x55e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba0_mem3.h  -start 0x54e000 -end 0x55e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba0_mem4.h  -start 0x54e000 -end 0x55e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba1_mem0.h  -start 0x454e000 -end 0x455e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba1_mem1.h  -start 0x454e000 -end 0x455e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba1_mem2.h  -start 0x454e000 -end 0x455e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba1_mem3.h  -start 0x454e000 -end 0x455e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba1_mem4.h  -start 0x454e000 -end 0x455e3ff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba2_mem0.h  -start 0x854e000 -end 0x855e138
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba2_mem1.h  -start 0x854e000 -end 0x855e138
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba2_mem2.h  -start 0x854e000 -end 0x855e138
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba2_mem3.h  -start 0x854e000 -end 0x855e138
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba2_mem4.h  -start 0x854e000 -end 0x855e138
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba3_mem0.h  -start 0xc54e000 -end 0xc55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba3_mem1.h  -start 0xc54e000 -end 0xc55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba3_mem2.h  -start 0xc54e000 -end 0xc55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba3_mem3.h  -start 0xc54e000 -end 0xc55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba3_mem4.h  -start 0xc54e000 -end 0xc55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba4_mem0.h  -start 0x1054e000 -end 0x1055dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba4_mem1.h  -start 0x1054e000 -end 0x1055dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba4_mem2.h  -start 0x1054e000 -end 0x1055dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba4_mem3.h  -start 0x1054e000 -end 0x1055dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba4_mem4.h  -start 0x1054e000 -end 0x1055dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba5_mem0.h  -start 0x1454e000 -end 0x1455dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba5_mem1.h  -start 0x1454e000 -end 0x1455dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba5_mem2.h  -start 0x1454e000 -end 0x1455dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba5_mem3.h  -start 0x1454e000 -end 0x1455dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba5_mem4.h  -start 0x1454e000 -end 0x1455dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba6_mem0.h  -start 0x1854e000 -end 0x1855dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba6_mem1.h  -start 0x1854e000 -end 0x1855dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba6_mem2.h  -start 0x1854e000 -end 0x1855dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba6_mem3.h  -start 0x1854e000 -end 0x1855dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba6_mem4.h  -start 0x1854e000 -end 0x1855dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb0_ba7_mem0.h  -start 0x1c54e000 -end 0x1c55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb0_ba7_mem1.h  -start 0x1c54e000 -end 0x1c55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb0_ba7_mem2.h  -start 0x1c54e000 -end 0x1c55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb0_ba7_mem3.h  -start 0x1c54e000 -end 0x1c55dfff
memory -load %readmemh {test_top.ddrc_tb_0.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb0_ba7_mem4.h  -start 0x1c54e000 -end 0x1c55dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba0_mem0.h  -start 0x54e000 -end 0x57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba0_mem1.h  -start 0x54e000 -end 0x57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba0_mem2.h  -start 0x54e000 -end 0x57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba0_mem3.h  -start 0x54e000 -end 0x57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba0_mem4.h  -start 0x54e000 -end 0x57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba1_mem0.h  -start 0x454e000 -end 0x457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba1_mem1.h  -start 0x454e000 -end 0x457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba1_mem2.h  -start 0x454e000 -end 0x457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba1_mem3.h  -start 0x454e000 -end 0x457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba1_mem4.h  -start 0x454e000 -end 0x457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba2_mem0.h  -start 0x854e000 -end 0x857e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba2_mem1.h  -start 0x854e000 -end 0x857e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba2_mem2.h  -start 0x854e000 -end 0x857e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba2_mem3.h  -start 0x854e000 -end 0x857e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba2_mem4.h  -start 0x854e000 -end 0x857e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba3_mem0.h  -start 0xc54e000 -end 0xc57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba3_mem1.h  -start 0xc54e000 -end 0xc57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba3_mem2.h  -start 0xc54e000 -end 0xc57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba3_mem3.h  -start 0xc54e000 -end 0xc57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba3_mem4.h  -start 0xc54e000 -end 0xc57e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba4_mem0.h  -start 0x1054e000 -end 0x1057e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba4_mem1.h  -start 0x1054e000 -end 0x1057e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba4_mem2.h  -start 0x1054e000 -end 0x1057e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba4_mem3.h  -start 0x1054e000 -end 0x1057e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba4_mem4.h  -start 0x1054e000 -end 0x1057e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba5_mem0.h  -start 0x1454e000 -end 0x1457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba5_mem1.h  -start 0x1454e000 -end 0x1457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba5_mem2.h  -start 0x1454e000 -end 0x1457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba5_mem3.h  -start 0x1454e000 -end 0x1457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba5_mem4.h  -start 0x1454e000 -end 0x1457e3ff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba6_mem0.h  -start 0x1854e000 -end 0x1857dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba6_mem1.h  -start 0x1854e000 -end 0x1857dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba6_mem2.h  -start 0x1854e000 -end 0x1857dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba6_mem3.h  -start 0x1854e000 -end 0x1857dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba6_mem4.h  -start 0x1854e000 -end 0x1857dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x0.memcore} -file ./wave/bs_4k_load_tb1_ba7_mem0.h  -start 0x1c54e000 -end 0x1c57dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x1.memcore} -file ./wave/bs_4k_load_tb1_ba7_mem1.h  -start 0x1c54e000 -end 0x1c57dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x2.memcore} -file ./wave/bs_4k_load_tb1_ba7_mem2.h  -start 0x1c54e000 -end 0x1c57dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x3.memcore} -file ./wave/bs_4k_load_tb1_ba7_mem3.h  -start 0x1c54e000 -end 0x1c57dfff
memory -load %readmemh {test_top.ddrc_tb_1.model_4Gx16_x4.memcore} -file ./wave/bs_4k_load_tb1_ba7_mem4.h  -start 0x1c54e000 -end 0x1c57dfff
